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java.lang.Objectdioscuri.module.cpu.Instruction_XOR_GvEv
public class Instruction_XOR_GvEv
Intel opcode 33
 Logical word-sized XOR of register (destination) and memory/register
 (source).
 The addressbyte determines the source (sss bits) and destination (rrr bits).
 Flags modified: OF, SF, ZF, AF, PF, CF
| Constructor Summary | |
|---|---|
Instruction_XOR_GvEv()
Class constructor  | 
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Instruction_XOR_GvEv(CPU processor)
Class constructor specifying processor reference  | 
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| Method Summary | |
|---|---|
 void | 
execute()
Logical XOR of memory/register (destination) and register (source). OF and CF are cleared.  | 
| Methods inherited from class java.lang.Object | 
|---|
clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait | 
| Constructor Detail | 
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public Instruction_XOR_GvEv()
public Instruction_XOR_GvEv(CPU processor)
processor - Reference to CPU class| Method Detail | 
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public void execute()
execute in interface Instruction
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