dioscuri.module.cpu
Class Instruction_TEST_EvGv

java.lang.Object
  dioscuri.module.cpu.Instruction_TEST_EvGv

All Implemented Interfaces:

Instruction

public class Instruction_TEST_EvGv
extends java.lang.Object
implements Instruction

Intel opcode 85
Logical word-sized comparison (AND) of memory/register (destination) and register (source).
The addressbyte determines the source (rrr bits) and destination (sss bits).
Does not update any registers, only sets appropriate flags.
Flags modified: OF, SF, ZF, AF, PF, CF

Constructor Summary

Instruction_TEST_EvGv()
Class constructor

Instruction_TEST_EvGv(CPU processor)
Class constructor specifying processor reference

Method Summary

void	execute() Logical word-sized comparison (AND) of memory/register (destination) and register (source). Does not update any registers, only sets appropriate flags. SF, ZF, and PF are set according to the result; OF and CF are cleared.

Methods inherited from class java.lang.Object

clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

Constructor Detail

Instruction_TEST_EvGv

public Instruction_TEST_EvGv()

Class constructor

Instruction_TEST_EvGv

public Instruction_TEST_EvGv(CPU processor)

Class constructor specifying processor reference

Parameters:

processor - Reference to CPU class

Method Detail

execute

public void execute()

Logical word-sized comparison (AND) of memory/register (destination) and register (source).
Does not update any registers, only sets appropriate flags.
SF, ZF, and PF are set according to the result;
OF and CF are cleared. AF is undefined.

Specified by:

execute in interface Instruction