nl.kbna.dioscuri.module.cpu
Class Instruction_AND_EbGb
java.lang.Object
nl.kbna.dioscuri.module.cpu.Instruction_AND_EbGb
- All Implemented Interfaces:
- Instruction
public class Instruction_AND_EbGb
- extends java.lang.Object
- implements Instruction
Intel opcode 20
Logical byte-sized AND of memory/register (destination) and register
(source).
The addressbyte determines the source (rrr bits) and destination (sss bits).
Flags modified: OF, SF, ZF, AF, PF, CF
|
Method Summary |
void |
execute()
Logical AND of memory/register (destination) and register (source). |
| Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait |
cpu
private CPU cpu
operandWordSize
boolean operandWordSize
addressByte
byte addressByte
memoryReferenceLocation
byte[] memoryReferenceLocation
memoryReferenceDisplacement
byte[] memoryReferenceDisplacement
sourceValue
byte sourceValue
destinationRegister
byte[] destinationRegister
registerHighLow
byte registerHighLow
logicalANDResult
byte logicalANDResult
Instruction_AND_EbGb
public Instruction_AND_EbGb()
- Class constructor
Instruction_AND_EbGb
public Instruction_AND_EbGb(CPU processor)
- Class constructor specifying processor reference
- Parameters:
processor - Reference to CPU class
execute
public void execute()
- Logical AND of memory/register (destination) and register (source).
OF and CF are cleared. AF is undefined.
- Specified by:
execute in interface Instruction