dioscuri.module.cpu
Class Instruction_OR_GvEv

java.lang.Object
  extended by dioscuri.module.cpu.Instruction_OR_GvEv
All Implemented Interfaces:
Instruction

public class Instruction_OR_GvEv
extends java.lang.Object
implements Instruction

Intel opcode 0B
Logical word-sized OR of register (destination) and memory/register (source).
The addressbyte determines the source (sss bits) and destination (rrr bits).
Flags modified: OF, SF, ZF, AF, PF, CF


Constructor Summary
Instruction_OR_GvEv()
          Class constructor
Instruction_OR_GvEv(CPU processor)
          Class constructor specifying processor reference
 
Method Summary
 void execute()
          Logical OR of memory/register (destination) and register (source).
OF and CF are cleared.
 
Methods inherited from class java.lang.Object
clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait
 

Constructor Detail

Instruction_OR_GvEv

public Instruction_OR_GvEv()
Class constructor


Instruction_OR_GvEv

public Instruction_OR_GvEv(CPU processor)
Class constructor specifying processor reference

Parameters:
processor - Reference to CPU class
Method Detail

execute

public void execute()
Logical OR of memory/register (destination) and register (source).
OF and CF are cleared. AF is undefined.

Specified by:
execute in interface Instruction